DFT — Design For Test
Scan insertion, ATPG, BIST, boundary scan and test compression strategies used across industry-standard DFT flows.
Full Syllabus
What you'll learn
From testability fundamentals through pattern generation and signoff.
Testability Foundations
✓Digital design and fault modelling fundamentals
✓Controllability and observability concepts
✓Scan design fundamentals — full scan and partial scan
✓Scan cell types and scan chain insertion
✓DFT rule checking and design compliance
DFT Flow & Signoff
✓ATPG concepts and pattern generation flow
✓Fault coverage analysis and pattern optimisation
✓Memory BIST (MBIST) architecture and insertion
✓Logic BIST (LBIST) concepts
✓Boundary scan (JTAG / IEEE 1149.1) implementation
✓Test compression techniques and signoff checks
Mentor TessentATPGBIST